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features ? fast read access time ? 45ns ? low-power cmos operation ? 100a max standby ? 20ma max active at 5mhz ? jedec standard packages ? 28-lead pdip ? 32-lead plcc ? 5v ? ? 10% supply ? high reliability cmos technology ? 2,000v esd protection ? 200ma latchup immunity ? rapid programming algorithm ? 100s/byte (typical) ? cmos- and ttl-compatible inputs and outputs ? integrated product identification code ? industrial and automotive temperature ranges ? green (pb/halide-free) packaging option 1. description the atmel ? at27c256r is a low-power, high-performance, 262,144-bit, one-time pro- grammable, read-only memory (otp eprom) organized as 32k by 8 bits. it requires only one 5v power supply in normal read mode operation. any byte can be accessed in less than 45ns, eliminating the need for speed reducing wait states on high-performance micropro- cessor systems. the atmel scaled cmos technology provides low active power consumption and fast pro- gramming. power consumption is typically only 8ma in active mode and less than 10a in standby mode. the at27c256r is available in a choice of industry-standard, jedec-approved, one-time programmable (otp) pdip and plcc packages. all devices feature two-line control ( ce, oe) to give designers the flexibility to prevent bus contention. with 32k byte storage capability, the at27c256r allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media. the at27c256r has additional features to ensure high quality and efficient production use. the rapid programming algorithm reduces the time required to program the part and guar- antees reliable programming. programming time is typically only 100s/byte. the integrated product identification code electronically identifies the device and manufacturer. this feature is used by industry-standard programming equipment to select the proper pro- gramming algorithms and voltages. 256k (32k x 8) one-time programmable, read-only memory atmel at27c256r 0014o?eprom?10/11
2 0014o?eprom?10/11 atmel at27c256r 2. pin configurations 3. system considerations switching between active and standby conditions via the chip enable pin may produce transient voltage excursions. unless accommodated by the system design, these transients may exceed datasheet limits, resulting in device non-conformance. at a minimum, a 0.1f, high-frequency, low inherent inductance, ceramic capacitor should be utilized for each device. this capacitor should be connected between the v cc and ground terminals of the device, as close to the device as possible. additionally, to stabilize the supply voltage level on printed circuit boards with large eprom arrays, a 4.7f bulk electrolyti c capacitor should be utilized, again connected between the v cc and ground terminals. this capacitor should be positioned as close as possible to the point where the power supply is connected to the array. figure 3-1. block diagram pin name function a0 - a14 addresses o0 - o7 outputs ce chip enable oe output enable nc no connect 5 6 7 8 9 10 11 12 13 29 28 27 26 25 24 23 22 21 a6 a5 a4 a3 a2 a1 a0 nc o0 a8 a9 a11 nc oe a10 ce o7 o6 4 3 2 1 32 31 30 14 15 16 17 18 19 20 o1 o2 gnd nc o3 o4 o5 a7 a12 vpp nc vcc a14 a13 note: plcc package pins 1 and 17 are ?don?t connect? 32-lead plcc top view 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 vpp a12 a7 a6 a5 a4 a3 a2 a1 a0 o0 o1 o2 gnd vcc a14 a13 a8 a9 a11 oe a10 ce o7 o6 o5 o4 o3 28-lead pdip top view
3 0014o?eprom?10/11 atmel at27c256r 4. absolute maximum ratings* note: 1. minimum voltage is -0.6v dc, which may undershoot to -2.0v for pulses of less than 20ns. maximum output pin voltage is v cc + 0.75v dc, which may overshoot to +7.0v for pulses of less than 20ns. 5. dc and ac characteristics table 5-1. operating modes notes: 1. x can be v il or v ih . 2. refer to programming characteristics. 3. v h = 12.0 0.5v. 4. two identifier bytes may be selected. all ai inputs are held low (v il ), except a9, which is set to v h , and a0, which is tog- gled low (v il ) to select the manufacturer?s identification byte and high (v ih ) to select the device code byte. table 5-2. dc and ac operating conditions for read operation temperature under bias . . . . . . . . . . . . . .-55c to +125c *notice: stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. storage temperature . . . . . . . . . . . . . . . . .-65c to +150c voltage on any pin with respect to ground . . . . . . . . . . . . . . . . . . . -2.0v to +7.0v (1) voltage on a9 with respect to ground . . . . . . . . . . . . . . . . . -2.0v to +14.0v (1) v pp supply voltage with respect to ground . . . . . . . . . . . . . . . . . . -2.0v to +14.0v (1) mode/pin ce oe ai v pp outputs read v il v il ai v cc d out output disable v il v ih x (1) v cc high z standby v ih x (1) x (1) v cc high z rapid program (2) v il v ih ai v pp d in pgm verify (2) x (1) v il ai v pp d out optional pgm verify (2) v il v il ai v cc d out pgm inhibit (2) v ih v ih x (1) v pp high z product identification (4) v il v il a9 = v h (3) a0 = v ih or v il a1 - a14 = v il v cc identification code atmel at27c256r -45 -70 operating temp. (case) ind. -40 ? c - 85 ? c -40 ? c - 85 ? c auto. -40 ? c - 125 ? c v cc supply 5v ? 10% 5v ? 10%
4 0014o?eprom?10/11 atmel at27c256r table 5-3. dc and operating characteristics for read operation notes: 1. v cc must be applied simultaneously with or before v pp , and removed simultaneously with or after v pp . 2. v pp may be connected directly to v cc , except during programming. the supply current would then be the sum of i cc and i pp . table 5-4. ac characteristics for read operation note: 1. see ac waveforms for read operation. symbol parameter condition min max units i li input load current v in = 0v to v cc ind. 1 a auto. 5 a i lo output leakage current v out = 0v to v cc ind. 5 a auto. 10 a i pp1 (2) v pp (1) read/standby current v pp = v cc 10 a i sb v cc (1) standby current i sb1 (cmos), ce = v cc ? 0.3v 100 a i sb2 (ttl), ce = 2.0 to v cc + 0.5v 1 ma i cc v cc active current f = 5mhz, i out = 0ma, e = v il 20 ma v il input low voltage -0.6 0.8 v v ih input high voltage 2.0 v cc + 0.5 v v ol output low voltage i ol = 2.1ma 0.4 v v oh output high voltage i oh = -400a 2.4 v symbol parameter condition atmel at27c256r units -45 -70 min max min max t acc (1) address to output delay ce = oe = v il 45 70 ns t ce (1) ce to output delay oe = v il 45 70 ns t oe (1) oe to output delay ce = v il 20 30 ns t df (1) oe or ce high to output float, whichever occurred first 20 25 ns t oh output hold from address, ce or oe, whichever occurred first 77 ns
5 0014o?eprom?10/11 atmel at27c256r figure 5-1. ac waveforms for read operation (1) notes: 1. timing measurement reference level is 1.5v for -45 devices. input ac drive levels are v il = 0.0v and v ih = 3.0v. timing measurement reference levels for all other speed grades are v ol = 0.8v and v oh = 2.0v. input ac drive levels are v il = 0.45v and v ih = 2.4v. 2. oe may be delayed up to t ce - t oe after the falling edge of ce without impact on t ce . 3. oe may be delayed up to t acc - t oe after the address is valid without impact on t acc . 4. this parameter is only sampled, and is not 100% tested. 5. output float is defined as the point when data is no longer driven. figure 5-2. input test waveforms and measurement levels t r , t f < 5ns (10% to 90%) for -45 devices only: t r , t f < 20ns (10% to 90%) for -70 devices:
6 0014o?eprom?10/11 atmel at27c256r figure 5-3. output test load note: 1. c l = 100pf including jig capacitance, except for the -45 devices, where c l = 30pf. table 5-5. pin capacitance note: 1. typical values for nominal supply voltage. this parameter is only sampled, and is not 100% tested. figure 5-4. programming waveforms (1) notes: 1. the input timing reference is 0.8v for v il and 2.0v for v ih . 2. t oe and t dfp are characteristics of the device, but must be accommodated by the programmer. 3. when programming the atmel at27c256r, a 0.1f capacitor is required across v pp and ground to suppress spurious volt- age transients. f = 1mhz, t = 25c (1) symbol typ max units conditions c in 4 6 pf v in = 0v c out 812pfv out = 0v
7 0014o?eprom?10/11 atmel at27c256r table 5-6. dc programming characteristics table 5-7. ac programming characteristics notes: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously with or after v pp . 2. this parameter is only sampled, and is not 100% tested. output float is defined as the point where data is no longer driven. see timing diagram. 3. program pulse width tolerance is 100s ?? 5%. table 5-8. the atmel at27c256r integrated product identification code t a = 25 ? 5c, v cc = 6.5 ? 0.25v, v pp = 13.0 ? 0.25v symbol parameter test conditions limits units min max i li input load current v in = v il ,v ih 10 a v il input low level -0.6 0.8 v v ih input high level 2.0 v cc + 1 v v ol output low volt i ol = 2.1ma 0.4 v v oh output high volt i oh = -400a 2.4 v i cc2 v cc supply current (program and verify) 25 ma i pp2 v pp current ce = v il 25 ma v id a9 product identification voltage 11.5 12.5 v t a = 25 ? 5c, v cc = 6.5 ? 0.25v, v pp = 13.0 ? 0.25v symbol parameter test conditions (1) limits units min max t as address setup time input rise and fall times (10% to 90%) 20ns input pulse levels 0.45v to 2.4v input timing reference level 0.8v to 2.0v output timing reference level 0.8v to 2.0v 2s t oes oe setup time 2 s t ds data setup time 2 s t ah address hold time 0 s t dh data hold time 2 s t dfp oe high to output float delay (2) 0 130 ns t vps v pp setup time 2 s t vcs v cc setup time 2 s t pw ce program pulse width (3) 95 105 s t oe data valid from oe (2) 150 ns t prt v pp pulse rise time during programming 50 ns codes pins hex data a0 o7 o6 o5 o4 o3 o2 o1 o0 manufacturer 0 0 0 011110 1e device type 1 1 0 001100 8c
8 0014o?eprom?10/11 atmel at27c256r 6. rapid programming algorithm a 100s ce pulse width is used to program. the address is set to the first location. v cc is raised to 6.5v and v pp is raised to 13.0v. each address is first programmed with one 100s ce pulse without verification. then a verification/reprogramming loop is executed for each address. in the event a byte fails to pass verification, up to 10 successive 100s pulses are applied with a verification after each pulse. if the byte fails to verify after 10 pulses have been applied, the part is considered failed. after the byte verifies properly, the next address is selected until all have been checked. v pp is then lowered to 5.0v and v cc to 5.0v. all bytes are read again and compared with the original data to determine if the device passes or fails. figure 6-1. rapid programming algorithm
9 0014o?eprom?10/11 atmel at27c256r 7. ordering information green package (pb/halide-free) t acc (ns) i cc (ma) atmel ordering code package lead finish operation range active standby 45 20 0.1 AT27C256R-45JU at27c256r-45pu 32j 28p6 matte tin matte tin industrial (-40 ? c to 85 ? c) 70 20 0.1 at27c256r-70ju at27c256r-70pu 32j 28p6 matte tin matte tin industrial (-40 ? c to 85 ? c) package type 32j 32-lead, plastic, j-leaded chip carrier (plcc) 28p6 28-lead, 0.600" wide, plastic, dual inline package (pdip)
10 0014o?eprom?10/11 atmel at27c256r 8. packaging information 32j ? plcc drawing no. rev. title 32j, 32-lead, plastic j-leaded chip carrier (plcc) b 32j 10/04/01 1.14(0.045) x 45 pin no. 1 identifier 1.14(0.045) x 45 0.51(0.020)max 0.318(0.0125) 0.191(0.0075) a2 45 max (3x) a a1 b1 e2 b e e1 e d1 d d2 common dimensions (unit of measure = mm) symbol min nom max note package drawing contact: packagedrawings@atmel.com notes: 1. this package conforms to jedec reference ms-016, variation ae. 2. dimensions d1 and e1 do not include mold protrusion. allowable protrusion is .010"(0.254mm) per side. dimension d1 and e1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. lead coplanarity is 0.004" (0.10mm) maximum. a 3.175 ? 3.556 a1 1.524 ? 2.413 a2 0.381 ? ? d 12.319 ? 12.573 d1 11.354 ? 11.506 note 2 d2 9.906 ? 10.922 e 14.859 ? 15.113 e1 13.894 ? 14.046 note 2 e2 12.471 ? 13.487 b 0.660 ? 0.813 b1 0.330 ? 0.533 e 1.270 typ
11 0014o?eprom?10/11 atmel at27c256r 28p6 ? pdip title drawing no. rev. 28p6, 28-lead (0.600"/15.24mm wide) plastic dual inline package (pdip) b 28p6 09/28/01 pin 1 e1 a1 b ref e b1 c l seating plane a 0o ~ 15o d e eb common dimensions (unit of measure = mm) symbol min nom max note a ? ? 4.826 a1 0.381 ? ? d 36.703 ? 37.338 note 2 e 15.240 ? 15.875 e1 13.462 ? 13.970 note 2 b 0.356 ? 0.559 b1 1.041 ? 1.651 l 3.048 ? 3.556 c 0.203 ? 0.381 eb 15.494 ? 17.526 e 2.540 typ notes: 1. this package conforms to jedec reference ms-011, variation ab 2. dimensions d and e1 do not include mold flash or protrusion mold flash or protrusion shall not exceed 0.25mm (0.010") package drawing contact: packagedrawings@atmel.com
12 0014o?eprom?10/11 atmel at27c256r 9. revision history doc. rev. date comments 0014o 10/2011 correct pinouts 0014n 04/2011 remove tsop and soic packages add lead finish to ordering information 0014m 12/2007
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